Conversion of parallel data to serial data, termed serialization, and the converse operation, deserialization, are required for many data communication processes. The parallel data is generated on a bus, and is converted to serial data for transmission on one channel. As busses increase in width, typical busses having 64 lines or even more, the speed at which data which has been serialized needs to be transmitted must of necessity increase, to avoid data build-up at the serializer interface. Serial data rates of Gigabits/s are typically required to avoid the build-up. Multichannel SERDES (serializer-deserializer) devices comprise multiple serializers each having a serializer interface. Each interface generates a channel of serial data which is then transmitted to a receiver.
Recovery of such high speed multichannel serialized data presents considerable problems at the receiver. In systems known in the art a clock is recovered for each channel of the received data, and each clock is used to sample the received data. Typically, each recovered clock is locked to its own phase locked loop (PLL) oscillator. Furthermore, multiple sampling PLL clocks require respective elastic buffers for storing the sampled data, and there is typically an extra PLL clock for synchronizing all the sampling clocks to a common local clock.
However, each PLL may suffer from its own jitter, since it is locked to incoming data; in addition, problems are caused by the multiplicity of PLL clocks. The PLL is a highly sensitive circuit, so that in layout of a device having PLLs, each PLL is, for example, isolated as much as possible and has its own ground and supply lines. Devices requiring multiple PLL oscillators thus require more area and more pins, and typically give lower yields because one PLL failure causes device failure.
Data which is initially in an 8-bit (8b) form is typically encoded at the transmitter into an alternative form so that errors in the received data may be detected. An IEEE standard 802.3z, published by the Institute of Electronic and Electrical Engineers, New York, N.Y., describes an 8b/10b coding scheme, originally developed by IBM Corporation. Using the scheme, a transmitter maintains a table having a one-to-two correspondence, so that each 8b word may be transmitted as one of two 10b words. Each 10b word in the table has between 4 and 6 ones (and correspondingly 6 and 4 zeroes). A partial list of 8b and corresponding 10b words, according to the scheme, is shown in Table I below.
TABLE IFirstSecondRunning8-bitDecimalmapping B1mapping B2Disparitywordvalue(RD−)(RD+) (RD)000000000100111 0100011000 1011same000000011011101 0100100010 1011same000000102101101 0100010010 1011same000000113110001 1011110001 0100switch000001004110101 0100001010 1011same000001015101001 1011101001 0100switch000001106011001 1011011001 0100switch000001117111000 1011000111 0100switch000010008111001 0100000110 1011same000010019100101 1011100101 0100switch. . .. . .. . .. . .. . .10111100188 001110 1010001110 1010same10111101189 101110 1010010001 1010switch. . .. . .. . .. . .. . .11000100196 110101 0110001010 0110switch. . .. . .. . .. . .. . .11100100228 110101 0001001010 1110same. . .. . .. . .. . .. . .11111111255 101011 0001010100 1110same
A complete listing of Table I comprises 256 rows. As shown in Table I, each 8b word is mapped to one of two 10b words. The first mapping B1 comprises words having 5 or 6 ones. The second mapping B2 comprises words having 4 or 5 ones. In transmitting a string of 8b words, a transmitter calculates a total running disparity (RD) of the string—the difference between the total number of ones and the total number of zeroes transmitted. After each 10b word has been transmitted, the transmitter evaluates if RD is positive, negative, or zero. For RD+ the following 10b word is transmitted from the first mapping B1, and for RD− the following 10b word is transmitted from the second mapping B2. If RD is zero, the fourth column, stating whether the same mapping is used or if the mapping switches, is used. The transmitter is thus able to maintain the disparity of the transmitted string within the bounds of +1 and −1.
A receiver of the encoded data is able to use the disparity properties to detect if there are errors in the received data. Typically, the receiver calculates and updates a disparity status of the received string, and if this results in a value outside the bounds, the receiver knows that there is an error in the received data. Similarly, in receiving any two sequential 10b words, if the instruction in column four is violated, there is an error in the received data. However, in most cases the receiver is not able to know in exactly which received word the error occurred. Even if it does know the exact word, the receiver is not able to correct the error.
Performance of both data transmitters and data receivers is an important factor in their operation. One of the measurements of performance is signal quality, both transmitted signal quality and received signal quality. A method for measuring signal quality, known in the art, is by generating an “eye” pattern. The eye pattern may be generated in specialized equipment by repeatedly sampling the signal level and plotting the level on a vertical axis, while triggering a horizontal axis to a signal clock. A “perfect” signal would give a rectangle, and the quality of the actual signal is proportional to the “openness” of the eye pattern generated—the more open the center of the eye, the higher the signal quality.
The specialized equipment for generating eye patterns may be available in a facility where the transmitter and/or receiver are produced, so that adjustments to the transmitter and/or receiver may be made at the facility to improve signal quality. However, such signal quality measurements and adjustments to improve the quality may not be able to be made in an “on-site” situation, because of the lack of specialized equipment. There is thus a need for a signal quality indicator that overcomes these problems.